With the aid of a timing diagram sketch, explain the operation of the logic circuit shown in figure
2a. Given that the push–button ‘BTN0’ is normally open, determine the initial state of all flip–flops in
figure 2a, along with the signals ‘q2’, ‘q3’, ‘Start_P’ and ‘Start_T’, assuming that the flip–flop ‘U6’ is
initially reset to logic–0 by the ‘Reset’ input. Illustrate what happens when the push–button ‘BTN0’
is pressed and released once, and then again after a delay