The company’s plan is to use an FPGA for the actual design. What type of FPGA (SRAM
or antifuse) should be used?
b) A company is designing a product using an FPGA. The company’s plan is to use an FPGA for the actual design.
The product has undergone several revisions and is stable. Minimizing area, power and cost is important for the
company. What type of FPGA (SRAM or antifuse) should be used?
c) A company is designing a product. It expects to sell 1000 copies of it. Should they use an ASIC or FPGA for this
product?
d) A company is designing a product. It expects to sell 100 million copies of it. Should they use an ASIC or FPGA
for this product?
e) I am working on a digital design that has multiplication operations in it. I am using the FPGA from the CSE 320
lab. I want this multiplication operation to happen in 1 clock cycle. I want to run this design at the highest
frequency possible. Would I be better off mapping the multiplication to a “hard” multiplier (assuming it’s
available on the FPGA) or a “soft” multiplier?